1. Technical Field
This disclosure relates to a wafer, a reticle, and an exposure method using the wafer and reticle for exposing multiple chip areas formed on the wafer.
2. Description of the Related Art
In general, in a semiconductor device including an analog circuit, laser trimming is performed in order to improve its analog characteristics. In this laser trimming process, one method of aligning a semiconductor wafer and adjusting its angle (θ) is, for example, to provide an alignment mark formed of a conductive material such as aluminum or an aluminum alloy in an area other than the exposure area on the wafer, such as a scribe line, and aligning the wafer and adjusting its angle using this alignment mark. As another method, multiple TEG (Test Element Group) chips for measuring the electric characteristics of semiconductor devices are provided, and θ adjustment is performed using the TEG chips.
In manufacturing semiconductor devices, it is an important issue to increase the number of device chips manufacturable from a single semiconductor wafer because it leads to reduction in manufacturing costs. Therefore, there is proposed a method of narrowing the width of a scribe line. However, narrowing the width of a scribe line makes it difficult to form an alignment mark or a TEG chip.
Therefore, it is proposed to adjust θ of a semiconductor wafer for manufacturing minute device chips by providing an area different from a device chip area on the semiconductor wafer and disposing an alignment mark and a TEG area in the area (see, for example, Japanese Laid-Open Patent Application No. 2001-135569).
The metal of conductive metal patterns of aluminum, an aluminum alloy, etc., disposed in scribe lines and conductive metal such as aluminum, an aluminum alloy, etc., disposed in TEG chips adhere to a dicing cutter at the time of dicing so as to reduce the cutting property of the dicing cutter, thus causing reduction in device reliability due to insulating film cracks formed on the surface of a silicon substrate.
In a manufacturing line of multiple types and multiple chip sizes, it is difficult to adjust the positions and sizes of interconnection lines formed of a conductive material such as aluminum or an aluminum alloy in TEG chips and conductive metal such as aluminum or an aluminum alloy in scribe lines so that the interconnection lines and the conductive metal are prevented from coming into contact with a dicing cutter at the time of dicing.